Duplicate words from simple parallel decoder

I’m using Logic 2.3.7 on Linux with a simple parallel decoder set to falling edge and a one-bit bus, which I’m using to drive a custom HLA. I found my HLA was occasionally getting out of sync with the bits and on further investigation it seems the simple parallel decoder is occasionally emitting the same bit twice. I couldn’t find any other reports of this behaviour or any issues on the GitHub repository, but apologies if this is already reported.

There’s no double edge or other glitch on the clock signal, this happens even with a very generous glitch filter, and happens at a range of sample rates and clock speeds (e.g. 10kHz to 50MHz clock, 1MS/s to 500MS/s sample rate, glitch filter either off or up to half the clock period, etc). Using a digital measurement reports the correct number of rising and falling edges, and zooming all the way in to the edge doesn’t reveal anything either. More weirdly, if I save the capture and re-open it, it analyses perfectly, no duplicate bits, and my HLA stops going wrong. It seems to happen within a few hundred clock edges though I’ve not noticed any particular pattern as to exactly when it occurs.

Another symptom of the issue is the arrowheads on the clock falling edge that indicate sampling moments disappear whenever an edge which is double-counted is in view, so you can localise the problem quite quickly by scrolling around until the arrowheads appear/disappear. I guess this is because it’s trying to draw two on top of each other. Both the decode table and the frame.start_time in the HLA show exactly the same timestamps for the duplicate bit.

With arrowheads, duplicate edge slightly off-screen to the right:

Scrolling a few pixels right, duplicate edge comes into view, arrowheads vanish:

Data table:

I would upload a sample capture, but when I open it there’s no problem, this only occurs on live data.
For now I’m able to work around this by returning early from decode whenever frame.start_time is the same as the previous frame, but the analysis in Logic and the exported data from the decoder all contain the duplicate data, so it seemed worth reporting.

Now that I’m discarding duplicate bits in my HLA I’ve found what seems like a rarer issue in the simple parallel decoder, where a rising edge is getting counted as a falling edge:


As before there’s no sign of a clock glitch even fully zoomed in (here 10MS/s, no glitch filter, 10kHz clock), and the digital measurements also report the right number of rising and falling edges, but the parallel decoder has marked the rising edge as a falling one and emitted a decoded bit.

What’s more, after this occurs, all the following decodes appear on the rising edge (though the arrow still marks it as a falling edge):

As before, if I save the capture and re-open it, the analyser works fine and the correct edges are used.

Just a quick update, I’ve checked and both issues are still present in 2.3.8.

Thanks for reporting this! We’ve seen a similar bug in the I2C analyzer. The problem is related to how Logic 2 passes data to analyzers during the live capture.

Your report helps a lot, because it should be much easier for us to reproduce the bug using the parallel analyzer.

We have this logged and we should get to it quickly.

In the meantime, you will need to reset the parallel analyzer after recording the data. Unfortunately there isn’t a one click way to do this, but there are a few ways to do this:

  • changing any setting of the parallel analyzer will trigger a re-run. (if you don’t edit any settings, it won’t re-run)
  • trimming the captured data will restart all analyzers.
  • deleting and re-adding the parallel analyzer will cause it to re-run.
  • saving and loading the capture (as you’ve noticed) also fixes it.

I recommend adding the parallel analyzer, and then saving a preset in the software, so you can quickly re-add the parallel analyzer after deleting it.

Both issues are fixed in 2.3.9, thanks so much! :heart: