When connecting to a device that has extra bit clocks, it appears the alignment of the data is not being adhered too. This data is a split ramp with simple counting up and down from 1 and -1 on each channel, but the second channel will not follow the alignment skipping the MSB of the second channel and using one bit in the extra clocks.
@aaron.matlock Thanks for reporting this issue. I’d like to take a look at your .sal file in case this might be a bug in the I2S analyzer. Would you mind sending it in via the link below?
https://contact.saleae.com/hc/en-us/requests/new
Saving a capture file can be done via the instructions here:
https://support.saleae.com/user-guide/using-logic/saving-loading-and-exporting-data
Please copy the link to this forum post in the “Description” section so I know it’s from you when it comes in.
Also, in case you need to trim down the .sal capture file to fit as an attachment (in case it’s too large), you can follow the instructions below:
https://support.saleae.com/user-guide/using-logic/delete-data