Show bus value

Hello, we purchased this logic pro 16 intending to log the value of an 8 bit microcontroller port over time. A new value is written to the port when the state changes.

I assumed that either we can group the digital lanes into a bus, or else use the parallel decode option. However I see no capability to display a bus and the parallel decode option requires a clock.

This is a rudimentary logic analyzer function. Is there an option hiding somewhere?

Hey @keegan, thanks for letting us know your need for this. Unfortunately (and quite bit surprisingly), we don’t have a way of decoding this simple case.

Currently, our pre-installed analyzers will decode messages via the following methods:

  1. via a clock signal
  2. via a asynchronous signal (no clock) using a specified baud rate

What’s missing is a way to decode messages upon digital channel transitions.

I went ahead and logged your idea in a post below. We’ll keep track of other users who are interested in this feature there to help us with prioritization. Feel free to add your vote to it as well!

This is certainly something we will want to add to the software in the future.

Okay, thanks for letting me know. For now we will implement manually by exporting raw data.

Normally on devices I’ve used you can just group bits into a bus on the display. Implemented as an analyzer in your software, I think you could simply make a different parallel mode that is sensitive to rising/falling edges on all data bits.

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Understood. Also, thanks for finding the already existing idea post. I missed it when doing a quick search of existing ideas. I merged all comments into that one now so we have one place to track all the votes and notes from everyone on this feature request.