Hello everyone,
I’m trying to decode the 1-Wire signal using Saleae (Logic 2 Version 2.4.22)
It doesn’t recognize the data, as shown in the image below:
Can anyone help me?
Do you have a *.sal capture file you could share? Hard to check signal timing from the screenshot alone.
Yes, I have.
KIT.sal (503.8 KB)
S: Start Bit
P Parity Bit
The conditioner responds ACK
S: Start Bit
P: Parity Bit
What device or protocol is that?
I’m pretty sure 1-Wire is defined as per this:
…which has a different bit encoding than your pictures. See also:
https://www.analog.com/en/resources/app-notes/reading-and-writing-1wirereg-devices-through-serial-interfaces.html
Knowing the device / datasheet may help identify a different analyzer vs. “1-Wire” you are using.
Thank you very much for your help.
I am basing this datasheet on my work.
IDT_ZSC31010_DST_20160120_1.pdf (568.4 KB)
That datasheet helps to identify the protocol, and while they call it “one wire interface” (OWI), it is not the same as 1-Wire described at links above – it is also called “ZACwire™”, and is a PWM encoded scheme.
I think you’d need to use the Saleae Analyzer SDK to make a custom protocol decoder, as I am not aware of an existing one to use. I did find an old blog post about ZACwire analysis, but the author apparently never followed through with the custom analyzer for Saleae used to study the protocol.
Looking a little deeper into the bit-level encoding, you might be able to hack a quick decoder with the async serial analyzer, by using non-standard 6N1 decoding and the right bit rate. That is doing:
- 1 start bit (always low)
- 6 data bits
- 1 stop bit (always high)
The bit patterns would be:
- 00001111 = strobe (50%)
- 00111111 = ‘1’ (75%)
- 00000011 = ‘0’ (25%)
Convert/display as hex vs. binary, and don’t forget it’ll be little-endian (least significant bit first) by default, and the 6 middle bits are the data bits while first 0 is a ‘start’ bit and last 1 is a ‘stop’ bit.
Thus, you would get a ‘byte’ of 6N1 data per ‘bit’ of ZACwire protocol, and you would need to combine & decode/map those ‘byte’ values back to the logical 1’s and 0’s from above. Maybe not so helpful afterall, but just a thought 
Otherwise, if C++ isn’t your preferred language, you can use the high-level analyzer (HLA) python API to develop something, too.
Either chain it to the async analyzer mentioned above, or do something from scratch … possibly linked to the Saleae simple parallel analyzer instead. Just set the D0 and Clock both to your one wire channel, and the Clock State to BOTH edges. Then you get a 0 or 1 + timestamp at each falling/rising edge to build up your custom decoder in python.
Thanks for the help BitBob.
I’ll give this a try. 