Hi @huffman!
nice to see I’ve stirred some interest with my HLA and captures.
I’m sorry to say, but I agree that the generator approach doesn’t seem to lead to an elegant solution in this case. That may be I’m not really a Python user and not familiar with yield, but deeply nested code is generally regarded as a code smell. I’d have thought at least the outermost loop could go away if you used “continue” instead of “break” in the first inner loop. 8 yealds scattered through the code doesn’t bode well for understanding either. 
My own HLA is a pretty mixed bag tailored very much for the hardware I’m working on at the moment. In particular, it ignores any TUSB422 registers that I’m not interested in, and decodes non-TUSB422 traffic for I/O expanders that are very project specific. I don’t think there would be any harm in it being in the public domain, but it may not be very useful to anyone else either.