Is this an example of Where Glitch Filter should be on? YES

[Eddiie]

First, thank you for the work on Logic 2. (and Logic 1 for that matter)
This has been an invaluable tool in my tool box. Love you guys!

Today, I am reversing a VFD controller that is rumored to use 9bit serial to communicate because there are multiple devices on this ‘bus’. The 9th bit is used to notify the device that this packet is an address packet. The rest of the communication to the device is supposed to be normal 8bit.

19,200 baud, I have the analyzer set to its lowest setting, assuming 1k samples a second is enough, perhaps not?

The message on the display is - “PLEASE WAIT…TESTING MEMORY.”

My capture is the following -

Source          Type     Time       Duratio Data    Error   ASCII value               Expected
FROM Machine	data	 8.84464	0.00048	0x02		        Start of Text			
FROM Machine	data	 8.84524	0.00048	0x70	framing	p			
FROM Machine	data	 8.8458	    0.00048	0x22	framing	"			
FROM Machine	data	 8.84636	0.00048	0x00	framing				
FROM Machine	data	 8.84696	0.00048	0x00	framing				
FROM Machine	data	 8.84752	0.00048	0x00	framing				
FROM Machine	data	 8.84808	0.00048	0x02	framing	Start of Text			
FROM Machine	data	 8.84868	0.00048	0x3F	framing	?			
FROM Machine	data	 8.84924	0.00048	0x0E	framing	Shift Out			
FROM Machine	data	 8.8498	    0.00048	0x10	framing	data link escape			
FROM Machine	data	 8.8504	    0.00048	0x04	framing	end of transmission			
FROM Machine	data	 8.85096	0.00048	0x50	framing	(			                P
FROM Machine	data	 8.85152	0.00048	0x08	framing	backspace			        L
FROM Machine	data	 8.85212	0.00048	0x45	framing	E			                E
FROM Machine	data	 8.85268	0.00048	0x40	framing	@			                A
FROM Machine	data	 8.85324	0.00048	0x12	framing	device ctrl 2			    S
FROM Machine	data	 8.85384	0.00048	0x45	framing	E			                E
FROM Machine	data	 8.8544	    0.00048	0x20	framing	space			
FROM Machine	data	 8.85496	0.00048	0x1E	framing	record separator	       W
FROM Machine	data	 8.85556	0.00048	0x41	framing	A			               A
FROM Machine	data	 8.85612	0.00048	0x48	framing	H			               I
FROM Machine	data	 8.85668	0.00048	0x1C	framing	file seperator		       T
FROM Machine	data	 8.85728	0.00048	0x2E	framing	.			                .
FROM Machine	data	 8.85784	0.00048	0x2E	framing	.			                .
FROM Machine	data	 8.8584	   0.00048	0x2E	framing	.			                .
FROM Machine	data	 8.859	   0.00048	0x44	framing	D			               T
FROM Machine	data	 8.85956	0.00048	0x45	framing	E			               E
FROM Machine	data	 8.86012	0.00048	0x12	framing	device ctrl 2		       S
FROM Machine	data	 8.86072	0.00048	0x44	framing	D			               T
FROM Machine	data	 8.86128	0.00048	0x49	framing	I			               I
FROM Machine	data	 8.86184	0.00048	0x0E	framing	Shift Out		           N
FROM Machine	data	 8.86244	0.00048	0x47	framing	apostrophe		           G
FROM Machine	data	 8.863	    0.00048	0x20	framing	data link escape		space	
FROM Machine	data	 8.86356	0.00048	0x0C	framing	form feed		          M
FROM Machine	data	 8.86416	0.00048	0x45	framing	-			              E
FROM Machine	data	 8.86472	0.00048	0x4D	framing	M			              M
FROM Machine	data	 8.86528	0.00048	0x0E	framing	Shift Out		          O
FROM Machine	data	 8.86588	0.00048	0x40	framing	@			              R
FROM Machine	data	 8.86644	0.00048	0x59	framing	Y			              Y
FROM Machine	data	 8.867	    0.00048	0x2E	framing	.			              .
FROM Machine	data	 8.8676	    0.00048	0x49	framing	I			
FROM Machine	data	 8.86816	0.00048	0x93	framing

I hope that pasted OK. The last column is what should have been captured…
Odd how some are OK and others are not.

Is this something Glitch Filter will clean up?
Or is this 9bit serial screwing something up? Note, when I change the analyzer to 9bit it doesn’t look any better… heh

I will try again tonight with Glitch Filter turned on, also go back to Logic 1 and see if it is the same.

It isn’t ‘line noise’… I feel if it was, the packets would be much longer. I think it is the third byte in the packet that tells the length of the message. It always matches. Line noise would screw that up.

[Eddiie]

I went back and got new samples with Glitch Filter turned on.
The result is that I still get “frame” errors but the DATA is accurate.

This is rumored to be 9bit… Maybe that is the frame error.

Changing the analyzer to 9bit … OK, I see what is going on now.

glitchfiltered.sal (157.1 KB)

[P.Jaquiery]

19200 baud is 19200 state changes a second so recording at 1000 samples a second is not going to cut it. I may be misunderstanding what you are doing of course. I would sample at at least 100kHz to get fairly accurate edge timing. Weird stuff happens if your sampling rate is close to the rate your signal is changing!

Note though that for digital inputs Logic records edges (state changes on the input) so the sampling rate for digital inputs can be very high without adding significant processing or storage cost.

[BitBob]

I think you want to either configure as 9-bit decoding (Async Serial):

… or maybe use the special Mode “MDB” of Async Serial and use 8-bit decoding:

Then, you can set the display format as either “Hexadecimal” or “Ascii” for the analyzer:

Which seems to decode your previously attached ‘glitchfiltered.sal’ capture okay:

Note: see the Wikipedia article for more information on MDB (Multi-Drop Bus) protocol for UART:

Multi-Drop Bus / Internal Communication Protocol

(I’m not sure that your VFD controller follows all of the details in this “MDB” protocol, but it does appear to share the concept of using a 9th bit to distinguish between ‘address’ and ‘data’ in a 9-bit asynchronous serial frame which makes the “MDB” mode potentially useful for you)

For more details on the special mode options and the async serial analyzer in general, see:

Async Serial Analyzer - User Guide