Hi Ari,
Sorry about this, and thanks for posting! I suspect there are two things at play.
- Our Logic 8’s voltage threshold is fixed at the following levels
- Voltage input LOW: 0.6 volts
- Voltage input HIGH: 1.2 volts
Regarding your first image, it looks like it takes some time before the digital channel will recognize it as a LOW signal. At what analog voltage reading does the digital transition from HIGH to LOW?
- For your second image, although the digital channels have an adequate sampling rate to capture the glitches, the analog channel’s sampling rate is unfortunately unable to keep up. Each dot in the analog capture represents the sample points, and the line that is drawn between them is a mathematical interpolation. In addition, the digital and analog on a single channel take different paths internally in the hardware.
More information here: https://support.saleae.com/troubleshooting/digital-and-analog-appear-different
Our eventual goal is to support higher bandwidths in the next generation hardware.