Circuit works okay when digital signal probed using Saleae LA

Hello,

I am using Saleae LA for troubleshooting a digital communication interface based on ARM SWD interface. More info is available at Documentation – Arm Developer

There are two digital signals involved in this interface namely SWDIO & SWCLK.
When I probe the SWDIO and SWCLK signals using Saleae LA, I see the host programmer(flash programmer for ARM Cortex M0+) is able to recognize the target ARM Cortex M0+ device.

But if I remove Saleae LA from SWD interface then I see my target device is no more recognized by the host flash programmer. This indicates that Saleae LA probes are inadvertently helps the SWD digital interface by some means. :grinning:

Can anyone share a technical explanation on what problem I am facing?

It’s pure speculation on my part. However, I’d check your ground connection. The Saleae LA needs to attach to ground. It is, itself, grounded to your USB plug. So, if you have a crummy ground then having the LA attached magically causes your ground connection to look a lot better. So, check the ground on your design. Maybe even run a fly wire from the MCU to somewhere you know has a good ground on your board - like a power supply.

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Ground connection or hold time issue.

@npd I thought I’d chime in with another speculation. Depending on which exact Saleae Logic model you own, you’ll want to check the input impedance of your Logic to see if that’s filtering any ringing that might be occuring.

I’d agree with Tim. In high impedance circuits, I have seen probing with the Saleae adds both a resistance to ground (1-2M) and capacitance. Can you try lowering the clock frequency to see it if makes a difference?

Loading causing less ringing is plausible, especially if it’s a serially terminated or unterminated line and there is a substantial distance between the two ends. @npd where are the Logic analyser connected vs the host programmer and the ARM Cortec M0+ processor?

Any capacitance would lower the edges and slow down to max frequency. Since the circuit works with the Logic but not without, it doesn’t sound like a capacitance/frequency issue to me (but hold time issues can sometimes require what seems as almost black magic to dispel).

Hold time, though, is a different beast. If lowering the frequency doesn’t resolve it, then hold time is a likely culprit.